Shift register



C. L. ISBORN SHIFT REGISTER Filed April l2, 1954 United States Patent O snrrr nnorsrnn Carl L. lshorn, Hawthorne, Calif., assigner, by mesne assignments, to The National Cash Register Company, a corporation of Maryland Application April 12, i954, Serial No. 422,550

8 Claims. (Cl. 34N-88) This invention relates to electronic shift registers and more particularly to a novel ferro-resonant Itype shift register.

Multi-stage storage register circuits for binary information which have the ability to shift infomation to successive stages under the control of input pulses are highly useful in electronic computers. lt has been previously shown, described, and claimed in the co-pending lsborn applications, Serial No. 175,784, tiled luly 25, 1950; and Serial No. 417,625, filed March 22, 1954, that ferroresonant type flip-iiop circuits can be provided comprised of reactive components. Since these flip-Hop circuits are relatively small and their power requirements are low, it `is highly desirable to connect these hip-glop circuits so as to form shift registers capable of storing and shifting large amounts of binary information.

It is accordingly an object of this invention to provide a novel ferro-resonant type shift register having low power requirements.

It lis another object of this invention to provide a shift register of relatively simple, economical construction.

It is a further object of this invention to provide novel interconnecting means for ferro-resonant flip-flop circuits.

Briefly, the present invention comprises an A. C. voltage supply connected across a cascade of ferro-resonant type nip-liep circuit stages. Each stage has a pair of conduction paths, only one of which can have relatively high current, while the other simultaneously has relatively low current. The current status of the paths is capable of being reversed on application of a trigger pulse thereto. Corresponding paths oi adjacent ilip-tlop circuit stages are connected to ground of the voltage supply by windings which comprise the primary of a transformer interconnecting the stages. These primary windings are wound so that the induced voltages oppose each other. The secondary winding of each transformer has its output connected to the star-ting electrode of a neon bulb gate which connects a source of shift pulses to the ltrigger input of each of the succeeding stages. Each neon bulb gate passes pulses to the trigger input of a flip-flop circuit stage only when the preceding stage is in a different state. Thus, it is only when the paths connected to a transformer are in an opposite conducting status that the stepped up voltage in the transformer secondary is capable of ionizing the neon bulb gate so as to enable shift pulses to pass therethrough.

Other objects and advantages of the present invention will be apparent from the following description of the drawings in which:

Fig. l is a schematic diagram of a ferro-resonant type shift register showing the present invention.

Figs. 2 and 3 are graphs for explaining the theory of operation of the ferro-resonant branches of the tlip-op circuits used in the shift register.

Reference is first made to Fig. l where a preferred embodiment of this invention is presented. For simplicity, only three stages of a multi-stage shift register are shown. These stages, designated A1, A2, and A3, respectively, are each comprised of a ferro-resonant ip- Patented Jan.- 22, 1957 ICC flop circuit. Inasmuch as the basic circuits of the three stages are similar, only stage Al will be particularly described; and the corresponding details of stage A2 will bear like reference designations with a prime, while those of stage A3 will be distinguished by a double prime. Thus stage All includes two ferro-resonant paths, Pa and Pb. Path Pa includes an inductor L1 in series with a capacitor C1 and path Pb includes an inductor La in series with a capacitor C2. F)The inductor ends of paths Pa and Pb are joined at junction 3 which is connected through a capacitor C3 'to voltage supply line fl of a low impedance A. C. source. An R. F. choke 4 provides a D. C. return to ground for junction 3. lnductors Li and L2 are comprised of windings 5 and 6 about cores 7 and S, respectively. These cores are preferably formed by rolling a thin sheet of ferro-magnetic material into a tube having lengthto-diameter ratio on the order of 1G to l. The capacitor C1 is returned directly to ground of the A. C. source while capacitor C2 is returned to ground by way of a iirst primary winding 15 of a transformer T1. it should be understood that the inductance added to path Pb by the winding i5 is small as compared to inductance L2 and hence can be regarded as :a part of the latter when con sidering the overall inductance of the path.

input trigger winding 9 is wound about the core 7 of inductor L1 and a similar input trigger winding 10 is wound about the core 8 of inductor L2. One end of each of the trigger windings 9 and lil is connected to ground, and `the other ends are connected to the two trigger input terminals 1l and i2, respectively. Two outputs, one from each path, are provided for the flip-flop circuit. Output lead i3 is connected to the common point of inductor L1 and. capacitor C1 of path Per, and output lead 14 is connected to a similar point of path Pb.

Each of the LC paths Pa and Pb has an inherent bistable operation according to the principle of ferroresonance. The bistability of path Pa, for example, as connected between junction 3 and ground, can be explained by referring to Figs. 2 and 3. The ferromagnetic core 7 of inductor L1 causes the reactance XL of the inductor L1 to Vary as a function of current therethrough. The reactance Xo of capacitor C1, on the other hand, is iixed and its Value is so chosen with relation to that of the inductor L1 that the passing of a small amount of current through path Pfl results in the net reactance being inductive, as shown in Fig. 2. As more current lis passed through the iron core inductor L1, the inductive reactance of the current decreases until the resonant point indicated at In. is reached. A further increase of current causes the iron core to surler A. C. saturation which results in a still further reduction of the effective inductive rcactance of inductor L1. This variation of net reactance with current can be shown to be regenerative for a predetermined operating voltage applied across the LC path such that the current can be made to jump between a stable point characterized by the net reactance being inductive, and a stable point characterized by the net reactance being slightly capacitative.

The jumping action of this circuit for a properly applied yoperating voltage isfurther explained by referring to the voltage-current characteristic curve shown in Fig. 3. As the A. C. vol-tage is increased, the voltage ELC across the LC path will first rise, reach a maximum, then decrease to a minimum at a current value In. A further increase of the current beyond In causes lthe voltage Eno to again rise. It is to be noted tha-t the slope T33 represents a negative reactance region which results in unstable operation of the circuit. But if the proper operating voltage is chosen land if the internal resistance of the circuit is relatively small, the LC path can beso operated that. it will exhibit two possible stable values of IAC, as shown by the graph of Fig. 3. Operating point M onthe graph is chaaroterized by a low current and a high inductive reactance, While operating poin-t N i-s characterized by a high current and a slightly capacitive reactance.

Referring again 4to `the stage A1 flip-liep circuit of Fig. l, the reactance of the common impedance C3 is chosen such that one and only one of paths Pa and Pb can be in the resonant or highly conductive condition at a time. If both should try Ito go into resonance, the voltage at junction 3 would fall so low owing to `the voltage Vdrop across capacitor Cs that neither path Pa nor path Pb will have a -suiiicient voltage across it to maintain resonance. On the other "hand, if paths Pa and Pb should both try to go out of resonance, vthe voltage at junction 3 would rise to such a value that one path or the other should be forced into resonance. The iiip-fiop conduction status is sensed -by means of the relative mag nitude of A. C. voltage appearing on the output leads connected to each yof 4the paths, such as output lead 14- conneoted to path Pb, for example. Thus, w-hen path Pb is in the high current state, output lead 14 has a relativelyl large A. C. voltage thereon while output lead 13 connected to path Pa simultaneously has a 'relatively low A. C. voltage lthereon.

In the preferred embodiment of Fig. l, stage A1 is a double input i'iip-ilop circuit while stages A2 and A3 are single input flip-flop circuits. The triggering of stage A1 will be iirst described. For example, assume that path Pa is initially in lthe relatively high conducting s-tate and path Pb is in `the relatively low conducting state. Upon applying a trigger pulse to input terminal 12, the `trigger winding 1t) is energized and the induc'tance of L2 is momentarily reduced owing to near saturation of core S. The inductive reactance of path Pb is yconsequently lowered resulting in lthe current increasing to a value characteristic of the relatively high operating state of the circuit. inasmuch a-s both paths cannot be in -t-he high operating state, path Pa simultaneously is found to change to lthe low operating state. The paths `of the circuit are now in -their opposite stable states and will remain there until a trigger pulse is applied to terminal `11 connected to the trigger coil of path Pa, at which time this latter path again jumps to Ithe high current operating state, while path Pa simultaneously returns to lthe low current operating state.

The single input iiip-op circuits of stages A2 and A3 operate in accordance with the same principles of ferroresonance discussed for the double input flip-flop of stage A1, with the exception of the manner of triggering the circuit. Referring to the single input iiip-flop of stage A2, it is t-o be noted that trigger winding 24 of inductor L1 is connected in series with trigger Winding 25 of inductor L2. Thus a signal applied on trigger input lead 26 of stage A2 energizes both trigger windings simul taneously. The flip-liep circuit of stage A3 has la similar triggerin-g arrangement. The signals applied on the shift pulse input lead 21 are sensed on trigger input lead 26 of stage A2 `dependen-t on 4the ionization status of a neon bulb gate Gi, and these signals are sensed on trigger input lead 42 of stage A3 dependent on Ithe ionization status of a neon bulb gate G2. The control of the gating operation of neon bulb gates G1 and G2 by transformers Ti and T2, respectively, will be discussed later.

Assume now, for purposes of explanation, -that the iiip-flop circuit of stage A2 is relatively highly conducting through path Pa', including Vinductor L1 therein, and that neon bulb gate G1 is ionized, thu-s allowing a trigger pulse applied on the shift register input lead 21 to pass `by way of input lead 26 onto trigger coils 24 and 25 of the flipiiop circuit.

In order `to enable -this :circuit to be reliably triggered to an opposite operating sta-tus by trigger pulses applied on its single input, an inductive memory circuit is preflerably connected to the output leads 13 and 14 of paths Pa and Pb', respectively. As shown in connection with output lead 13', this memory circuit includes a rectifier 28a and a series inductor 29a connected to resistor 30 and capacitor 31 shunting the output lead to ground. A similar inductive memory circuit including rectifier 23h and inductor 29!) is connected lto the output lead 14.

Consider now how inductors 29a and 22h serve as a reliable memory for aiding the triggering of the sin-gle -input ferro-resonant hip-flop circuit. As previously stated, it is assumed that the fiip-fiop circuit of stage A2 is Ihighly conducting ythrough path Pa including inductor Li therein. Thus inductor 29a connected to `the output path Pa is initially d-rawing relatively high current while inductor 2% connected to the output of path Pb' is drawing 'relatively Ilow current. The eect of a pulse applied lto the trigger windings 24 and 25 via lead Z6 is -to nearly saturate inductor L2', thus tending to drive path Pb into a relatively high current condition which results in a drop in voltage at junction 3. As a resul-t, the current in path Pn starts to decrease. A-t the termination of the trigger pulse, the voltage at junction 3 again rises owing to `the fact that neither path Pa no-r Pb is in resonance at this instant. The effect of this rising voltage will be to force either path Pa or path Pb' to go into resonance. Since path Pa and inductor 29a were initially passing a relatively high current while path Pb and consequently inductor 2% were passing a relatively low current, -the `latter path offers 4the least impedance to the vhigher Voltage at junction 3', and thus path Pb is favored to go into `resonance over path Pa. in other words, Kthe output inductor 29a or 29b which is connected to lthe highly conductive path provides an inductive-kick, by the countervoltage action, when the current status ofthe lip-iiop is interrupted by 'the trigger pulse. This inductive-kick persists `after the trigger pulse is terminated in accordance with the time constant of ythe indu-ctive memory circuit. This action effectively damps or loads the path which was previously in a high conducting statt-us, `thus favoring the other path to go into resonance.

The circuit arrangement of transformers Ti, T2, T3, etc. which serves t0 interconnect corresponding paths of stages A1 and A2, A2 and A3, etc. will now be described. As previously explained, path Pb includes the first primary winding 15 of transformer Ti therein and is returned to ground by way of the center tap 16. In a like manner, the corresponding path Pb of stage A2 is returned to ground through connection 43 which includes a second primary winding 17 of transformer Ti. Similarly, path Pa' of stage A2 is returned to ground through connection 44 which includes a first primary winding 18 of transformer T2, and the corresponding path Pa" of stage A3 is returned to ground by connection 46 which includes a second primary winding 20 of transformer T2. The corresponding paths of the remaining stages of the shift register are similarly connected to transformers Ta, etc. It should be noted :that the primary windings of each of the transformers, such as windings 15 and 17 of transformer T1, are oppositely Wound about the core of the transformer.

'The secondary winding 33 of transformer T1 is grounded at one end and the other end thereof is connected by lead 34 to a starter electrode 35 which is positioned about the envelope of neon bulb gate Gi. One internal electrode of neon bulb gate G1 is connected to the shift pulse input lead 21, and the other internal electrode of gate Gi is connected to lead 26 of the single input liip-flop circuit comprising stage A2. Similarly one end of secondary winding 37 of transformer T2 is grounded and the other end thereof is connected by lead 38 to the starter electrode 39 which is positioned about the envelope of neon bulb gate G2. Gate G2 serves to connect the shift pulse input lead 21 to lead 42 of the single input iiip-iiop circuit comprising stage A3.

It will next be described how binary information introduced into the first stage A1 by the triggering of veither terminal 11 or 12 can be shifted to succeeding StagesA of gritaban` the register under control of shift pulses applied on input lead 21. For purposes of explanation, assume that when relatively high current is flowing through path Pb of stage A1, the flip-flop is storing a one and when relatively high current is flowing through path Pa, the iiip-ilop is storing a zerof The conducting status of paths Pa and Pb of stage A2, Pa and Pb of stage A3, etc. are similarly interpreted. In order to visually indicate the binary information stored in a stage, each of the iiip-ops has a light bulb connected to the path which when highly conducting corresponds to a one status. Thus light bulb 47 is connected to path Pb of stage A1, and light bulbs 48 and 49 are connected to paths Pb and Pb of stages A2 and A3, respectively. It will next be assumed that stage A1 is registering a one therein, i. e., lamp i7 is lit; and that stages A2 and A3 are both registering zero, i. e., lamps 48 and 49 are extinguished. Thus the stages, from top to bottom as shown in Fig. 1, are assumed to be initially registering the binary combination 100.

Consider next the operation of transformer T1. Since path Pb is assumed to be in a relatively high conducting status, a high current flows through the primary winding 1d of transformer T1 connected 4in series therewith. However, the oppositely wound second primary winding 17 of transformer T1, which is connected in series with path Pb', has a relatively low current therethrough. Because of the difference in current llow in primary windings 15 and 17, an induced R. F. output voltage is obtained on secondary winding 33. The output voltage is conveyed via lead 34 to the starter electrode 35 of neon bulb gate G1. It is thus clear that transformer T1 serves to sense the :difference of current flow in corresponding paths of adjacent flip-flop circuits and to step up the voltage on the secondary output lead 34.

As a result of applying this R. F. voltage to the glass envelope of a neon bulb gate G1, ionization of the gas contained therein will ensue so as to enable the iirst shift pulse applied on input lead 21 to pass through the neon bulb gate G1 onto the trigger input lead 26 of stage A2. Thus the neon bulb G1 is used as a switch which is opened and closed by the presence or absence, respectively, of a suitable R. F. voltage on its starter electrode 3S.

Now consider the status of neon bulb gate G2 when the first shift pulse is applied on input lead 21. As stated before, the `shift register is initially assumed to be containing the binary combination 10d; and consequently the opposing windings 13 and 20 of transformer T2 both have relatively high current therethrough owing to the high current conducting status of paths Pa and Pa" of stages A2 and A3, respectively. The high current through both opposing windings 18 and 20 effectively lowers the Voltage on the secondary winding 37 of transformer T2. As a result, the neon bulb gate G2 is not ionized and the iirst shift pulse cannot pass onto lead i2 to trigger stage A3.

Thus, as a result of the first shift pulse on lead 21, the status of register stage A2 is changed from a zero to a one, While the status of register stage A3 remains unchanged. Assuming that the contents of stage A1 has not in the meantime been altered, the shift register now reads 11b. It is to be noted that with this content in the stages, neon bulb gate G1 is now closed because opposed primary windings and 17 both have an essentially equal (relatively high) current therethrough and the resulting voltage appearing on lead 34 from secondary Winding 33 is insuicient to ionize neon bulb gate G1. On the other hand, neon bulb gate G2 is now open because primary Winding 1S has a relatively low current therethrough owing to the changed conduction status of stage A2, while primary winding 2li still has a relatively high current therethrough. This unbalanced condition results in the appearance of a stepped up voltage on lead 38 of secondary Winding 37. This voltage is of suflicient magnitude to ionize neon bulb gate G2, thus completing the circuit from shift pulse input lead 21 to trigger input lead 42 of stage A3.

It is now obvious that when the second shift pulse is `applied onto input lead 21, the status of stage A3 is changed from a zero to a Lone, while stage A2 remains unchanged. Thus at the termination of this second shift pulse, assuming again that stage A1 has not been changed, the shift register now stores the binary combination 111. With this content in the stages, both neon bulb gates G1 and G2 are now effectively closed since the primary windings of transformers T1 and T2 have equal current therein.

The foregoing example illustrates how the shift register herein disclosed `operates in accordance with the requirement, for example, that if stage A2 is different from stage A1, then `stage A2 must change on the next shift pulse in order to agree with stage A1.

Push button switches 50 in each `of the output circuits of paths Pb, Pb', Pb, etc. `of the respective stages provide means for resetting the lstages to zero. Normally these push buttons Iare in the position shown in Fig. l and consequently have no effect on circuit operation. However, when these push buttons are depressed, paths Pb, Pb', and Pb, etc. yof the respective stages are effectively shorted to ground. Thus the opposite paths Pa, Pa', Pa, etc. of the respective stages go into resonance, if 'they are not already in this state, and all stages `attain their conventional zero status.

It is to be noted that the shift register can be connected into a ring if so desired. In such an `arrangement it may be desirable that stage A1 be `a single input flipflop. The path Pa of stage A1 would then be connected to ground through a rst primary winding of a transformer whose other primary winding is connected to a corresponding path of the last `stage of 'the register. The secondary of this latter transformer would then -be connected to the starter electrode of a neon bulb gate whose output would connect to the trigger input of stage A1. ln this manner, a relatively simple and convenient means would 'be provided for information recirculation.

Thus a preferred embodiment of a reliable, low power, ferro-resonant type shift register has been presented. Of course, the Ispecific apparatus Vand circuits just described represent but one for-m `of this invention and are not to be interpreted as a restriction `or limitation thereof. It is apparent that modification and variations of this shift register, using other forms of bistable state circuits, for example, may occur Ito those skilled in the electronic art Without departing from the spirit and scope of this invention as `defined in the appended claims.

What is claimed is:

l. A shift register comprising: Ia plurality of A. C. operated flip-flop circuits, each said circuit including a high land low current conducting path and la trigger input capable of reversing the status of said paths when energized; means interconnecting corresponding paths of adjacent flip-flop circuits 'for generating a signal when said paths 'are in opposite opera-ting states; la source of trigger signals; and gating mea-ns controlled by the signal-s from said interconnecting means for connecting said source of trigger signals to the trigger inputs of said flipflop circuits, whereby the `circuit status of each said flipilop circuit is shifted to the succeeding flip-flop circuit in response to `successive trigger signals from said source.

2. A shift register comprising: yan A. C. voltage supply; a plurality of A. C. operated flip-flop circuits -connected in parallel to said supply, each said hip-flop circuit including a high 'and low current conducting path and a trigger input; comparing means responsive to 'the current in corresponding paths of adjacent flip-flop circuits to generate a signal; a source of 'trigger signals; and gating means controlled by signals generated by said comparing means for connecting said source of trigger signals to the trigger input of each said ip-op circuit.

3. In a shift register: an A. C. source; a chain of stages connected to said A. C. source, each said stage comprising a single linput ferro-resonant type iip-flop circuit having a pair of branch. circuits, each of ysaid branch circuits comprising a series arrangement of a capacitor and a nonlinear inductor; a trigger signal source; `a gating means for connecting said trigger signal source to the input `of each said flip-flop circuit; Iand A. C. responsive means connecting each stage to the succeeding stage for generating a signal controlling the gating means to a flip-Hop stage when the preceding stage is in a differ-ent conducting status.

4. A shift register comprising: an A. C. source; a plurality of stages connected to said A. C. source, each said stage comprising a ferro-resonant type ip-op circuit having a pair of branch circuits, each said branch circuit comprising a series arrangement of a capacitor and a nonlinear inductor; a trigger circuit for each said lip-iiop circuit; a trigger signal source; a plurality of cold cathode gas tubes, each 'including a rst electrode connected to said trigger signal source, a second electrode `connected to the trigger circuit of one of said flip-Hop circuits, and a starter electrode; and a plurality of transformers, each having a pair of oppositely wound primary windings and a secondary winding, each said primary winding 'being connected in a branch of -a different dip-flop circuit and each said secondary winding 'being connected Vto the starter electrode of a cold cathode gas tube.

5. A shift register comprising: an A. C. supply; a cascade of ferro-resonant flip-dop circuits, each corresponding to stages of said register, connected across said supply, each saidfip-op circuit having a high and low conducting path indicative of the contents of the stage, the rst of Said flip-flop circuits having a pair of trigger inputs and the remaining circuits having a single trigger input; a shift pulse source; and gating means responsive to A. C. signals generated by adjacent flip-dop circuit stages for connecting said shift pulse source to the single trigger input of each said flip-Hop circuit stage when the previous stage is in an opposite state.

6. A shift register comprising: an A. C. supply; a cascade of ferro-resonant flip-op circuits, each corresponding to a stage of said register, connected across said supply, each said flip-flop circuits having a high and low conducting path indicative of the contents of the stage and a trigger input capable of reversing the status of said paths when energized; a shift pulse source; and gating means controlled by A. C. signals generated by said ip-tlop circuits for enabling shift pulses from said shift pulse source to energize the trigger input of a ilipfiop circuit when the previous stage is in an opposite state.

7. A shift register or the iike comprising: a cascade of A. C. operated bistable state stepping stages, each including an input thereto; a puise source; a cold cathode gas tube for connecting said sounce to the input of each of the stages; and a transformer for connecting each stage to the next higher order stage, each said transformer having two oppositely wound primary windings and a secondary winding, each said primary Winding connected to one of the adjacent stages, and said secondary windins7 connected to ionize the gas tub-e connected to the input of the higher order stage, whereby said gas tubes. gate shift pulses to the input of a stage when the lower order stage is in an opposite state.

8. A shift register comprising: an A. C. supply; a chain of stages connected to said A. C. supply, each said stage comprising a ferro-resonant type fiip-op circuit having a pair of branch circuits, only one of which can have relatively high current while the other simultaneously nas relatively low current, each of said branch circuits comprising a series arrangement of a capacitor, a non-linear inductor, and a primary winding; a trigger input circuit for each said hip-flop circuit; a trigger signal source; a cold cathode gas tube for connecting said trigger signal source to the input circuit of each said iip-fiop circuit except tne first in the chain; and Aa secondary winding responsive to the output of the combined primary windings or" corresponding branches of adjacent hip-flop circuits for generating a voltage to ionize the gas tube connected to the `input of the higher order flip-flop circuit when said branches are in opposite operating states, whereby the circuit status of each said flip-flop circuit is shifted to the succeeding flip-iop circuit in response to successive trigger signals from said source.

References Cited in the tile of this patent UNITED STATES PATENTS 2,623,108 Holden Dec. 23, 1952 2,640,164 Giel et al May 26, 1953 2,653,254 Spitzer et al Sept. 22, 1953 

